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★𝗜𝗣𝕔𝕠𝕣𝕖𝕤★

774 @ipcores

Каталог библиотек на VHDL и Verilog для разработчиков ASIC и FPGA Xilinx/Altera

★𝗜𝗣𝕔𝕠𝕣𝕖𝕤★

5 лет назад
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SimpleVOut - FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals in various formats. The cores connect using AXI-streams. Most configurations (resolution, framerate, colordepth, etc.) are set at compile-time using Verilog parameters. See svo_defines.vh for details on those parameters. Links: ▫️ Sources #verilog #AXIS #VGA #DVI #HDMI #OpenLDI @ipcores